1. Field of the Invention
The present disclosure relates to memory systems, and, more particularly, to systems and methods for detecting and correcting errors in multi-bit data stored in a flash memory device.
A claim of priority under 35 U.S.C. §119 is made to Korean Patent Application No. 2007-732, filed Jan. 3, 2007, the entire contents of which are hereby incorporated by reference.
2. Description of Related Art
Memory devices are generally categorized into volatile memory devices and non-volatile memory devices. There are many differences between volatile and non-volatile memory devices. For example, non-volatile memory devices retain stored data in the event of a power loss to the device. However, volatile memory devices loose the stored data when there is a power loss. Volatile memory devices include memory devices such as, for example, dynamic random access memories (DRAMs). Non-volatile memory devices include, for example, flash memory devices, read only memory (ROM) devices, electrically programmable read only memory devices (EPROM), and electrically erasable programmable read only (EEPROM) memory devices.
A flash memory device has many beneficial features. For example, though not as fast as dynamic random access memories (DRAMs), the flash memory device has a faster reading speed. Furthermore, a flash memory device can withstand a stronger impact on itself than a hard disk. While a flash memory can electrically erase and rewrite data, unlike EEPROMs, the flash memory device can erase and write data in block units. Furthermore, a flash memory device costs less than the EEPROMs. Because of these and other such features, flash memory devices are widely used as large capacity, non-volatile, solid-state storage devices. For example, flash memory devices are commonly used in cellular phones, digital cameras, and digital sound recording apparatuses.
Generally, the flash memory device stores data in an array including floating gate transistors. These floating gate transistors are called cells and store bit data. Initially, a flash memory device could only store 1-bit data in each cell. However, newer flash memory devices, called multi-level cell (MLC) devices, can store 1-bit or more in one cell by controlling an amount of electric charge accumulated on a floating gate of a cell.
In this disclosure, a flash memory device storing a 1-bit data in one memory cell is referred to as a single-level cell (SLC) flash memory device, and a flash memory device storing an M-bit data in one memory cell is referred to as a multi-level cell (MLC) flash memory device (M is a positive integer equal to or greater than 2).
Reference voltages are used to read data stored in a memory cell. In particular, a reference voltage is applied to a control gate of a memory cell and depending on whether current flows through the cell, the data stored in the cell is determined. Furthermore, the threshold voltage distributions for each reference voltage used to read data are different for different levels of data. For example, the threshold voltage distribution to read data ‘0’ is different than that used to read data ‘1’. Similarly, the threshold voltage distribution to read data ‘01’ is different and the threshold voltage distribution to read data ‘11’ is also different and so on.
The number of reference threshold voltage distributions used to read data from a flash memory device depends on the bits of data that can be stored in the memory device. That is, the number of threshold voltage distributions depends on whether 1-bit data, 2-bit data, 3-bit data, 4-bit data, etc., can be stored in the memory device. As an example, referring to FIG. 1, two threshold voltage distributions will be used for storing 1-bit data in one memory cell. On the other hand, referring to FIGS. 2 through 4, 2M threshold voltage distributions will be used for storing M-bit data in one memory cell. For example, four threshold voltage distributions are used for storing a 2-bit data in one memory cell, eight threshold voltage distributions are used for storing a 3-bit data in one memory cell, and sixteen threshold voltage distributions are used for storing a 4-bit data in one memory cell. Thus, as the number of data bits stored in one memory cell increases, more threshold voltage distributions will be used.
It follows that as the number of threshold voltage distributions increase, the total threshold voltage used to read data from a cell increases. However, as is well known in the art, there is a limitation in raising a threshold voltage of a memory cell. In other words, the threshold voltage for a memory cell should be distributed within a predetermined voltage range. This means that voltage threshold distributions should be distributed within a predetermined voltage range regardless of the number of data bits stored in one memory cell. For this reason, adjacent threshold voltages may overlap each other as illustrated in FIGS. 2 through 4. As adjacent threshold voltage distributions overlap, the read data may include many error bits (e.g., several error bits or tens of error bits.) Such a phenomenon would be more troublesome as the number of data bits stored in one memory cell increase. In addition, adjacent threshold voltage distributions may also overlap due to various other reasons such as, for example, charge loss, an elapse of a time, a temperature increase, coupling generated while adjacent cells are programmed, a reading operation of an adjacent cell, and other cell defects.